Dual Core Processing: Over-simplified, demystified and explained.
Are two cores better than one?
There will most likely be three terms that come up to fuel the dual core debate; pipeline, cache and bus.
This is the most basic of explanations of what a processor pipeline is. First the data instruction set is needed.
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A processor loads instructions into the pipeline. Think of the pipeline like a conveyor belt. The data is processed sequentially one after another.
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The AMD processor pipeline is shorter than the INTEL processor pipeline and this is one of the reasons why AMD runs at a lower clock speed.
Pipelining, like most things in life, is good in moderation. Making a processor’s pipeline too short causes a longer minimum clock period which hinders the manufacturer’s ability to ramp up the clock speed. Making the pipeline very long allows faster clock speeds however it also increases the cost of stalls and flushes which negatively affects performance and also increases the amount of resources required to pipeline the processor.
This is discussed in-depth in Icrontic’s Pipelining Explained article.
A shorter pipeline means that more work has to be done in the pipeline per clock cycle thus the clock speed cannot be as high compared to a processor with a longer pipeline. However, with a shorter pipeline, the data gets through it faster thus balancing the equation. This is one of the reasons why an AMD processor can compete with higher clocked INTEL processors.
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Data that that is continually used in preparation for the pipeline is stored in the processor’s cache and a processor is smart enough to anticipate what data it may require.
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If the processor needs to reach outside of the cache then it does so through the bus to system RAM. Now remember that the processor cache is running at the same clock speed as the processor itself. If it is a 2 GHz processor then the speed limit on the highway between cache and the rest of the processor is 2GHz. If the processor has to reach out through the bus to main system memory then it must slow down to that bus speed. A bus speed of 400 MHz is five times slower than the 2 GHz example.
In layman’s terms think of the processor as a carpenter. The carpenter’s truck is system memory and the cache are the tools he’s packed into the house for the job. The carpenter has anticipated what tools he may need to do the job. If the tool is not at hand then he must go back to the truck to get the right tool thus slowing down the job at hand.
Putting it all together
Two pairs of hands make the work go faster. This is quite true in computers with dual processors especially with SMP (Symmetric Multiprocessing) software. Not all software is SMP aware. In fact only a small percentage of it is. SMP capability is something that must be written into the code. The program must know that it can utilize two processors to complete processes simultaneously. This is known as multithreading.
A dual core processor is between a single core processor and a dual processor system for architecture. A dual core processor has two cores but will share some of the other hardware like the memory controller and bus. A dual processor system has completely separate hardware and shares nothing with the other processor.
A dual core processor won’t be twice as fast as a single core processor nor will it be as fast as a dual processor system.
It will fall somewhere in the middle but there are going to be specific advantages.
There will be two pipelines and that means there can be two sets of instructions being carried out simultaneously.
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There will also be two processor caches to keep more of the necessary “tools” or data on the processor die for faster access.
The trick will be the bus. If everyone wants on the bus at the same time then there will be the Keystone Cops comedy of errors as everyone tries to squeeze through the door at the same time. The two processor cores have to be designed to be smart enough to “wait” for the other to finish accessing the bus.
Now all of this is happening at the nanosecond level so don’t think there’s time for a coffee. Nanosecond wait states means there’s not even enough time to THINK about thinking about having a coffee.
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