KingFish
26 Jul 2004, 4:44pm
IBM is preparing a dual-core version of its 90nm PowerPC 970FX processor - aka the G5. Codenamed Antares, the chip will be delivered - likely in sample form - to Apple later this summer.
So claim "well-placed" but unnamed sources cited by Think Secret. In fact, the content of the story comes from a series of posts on the website's forum, and it isn't clear if Think Secret knows the identity of the forum contributor - or is just assuming the source is well-placed. Either way, the chip, to be formally called the PowerPC 970MP, is said to contain two 970 cores each with its own AltiVec/Velocity Engine SIMD unit and 1MB of L2, up from the 970FX's 512KB, but still without L3 cache support. It will be fabbed using silicon-on-insulator (SOI) materials, but that's no great surprise given IBM's well-established support for the technique. The die size is 13.23 x 11.63mm, and it is not pin-compatible with existing 970 and 970FX chips.
Source: The Register (http://www.theregister.co.uk/2004/07/26/ibm_ppc970mp/)
So claim "well-placed" but unnamed sources cited by Think Secret. In fact, the content of the story comes from a series of posts on the website's forum, and it isn't clear if Think Secret knows the identity of the forum contributor - or is just assuming the source is well-placed. Either way, the chip, to be formally called the PowerPC 970MP, is said to contain two 970 cores each with its own AltiVec/Velocity Engine SIMD unit and 1MB of L2, up from the 970FX's 512KB, but still without L3 cache support. It will be fabbed using silicon-on-insulator (SOI) materials, but that's no great surprise given IBM's well-established support for the technique. The die size is 13.23 x 11.63mm, and it is not pin-compatible with existing 970 and 970FX chips.
Source: The Register (http://www.theregister.co.uk/2004/07/26/ibm_ppc970mp/)