Intel demonstrates 32nm chip and Nehalem microarchitecture at the IDF

[primesuspect]

Today at the Intel Developer Forum, Intel demonstrated a chip built on a 32nm architecture - the world's smallest, as well as showing the Nehalem processor for the first time in public.

Nehalem is the successor to the Core microarchitecture. Shockingly, it is expected to bring higher performance while using less power. Taking a cue from a rival, it will include a DDR3 memory controller on die and anywhere from 1 to 8 cores. "They" say that Nehalem represents the most dramatic microarchitecture update since the Pentium Pro in 1995.

Nehalem is expect to debut in late 2008, with a die shrink to 32nm sometime in 2009.

[Thrax]

My life for Nehalem. unf.

[mmonnin]

I wonder what type of Lithography technology they are using to get down to 32nm..ebeam, x-ray, eUV, immersion. There are several ways to go after 193 DUV. Maybe I need to go ninja some stuff at work on our next 2 gens of NAND parts.

[Thrax]

eUV.

[mmonnin]

Hmm according to wiki Intel is going to use Immersion tech at 32nm.

http://en.wikipedia.org/wiki/Immersion_lithography

Our fab in Lehi is using Immersion already for our 55nm NAND part. Supposedly with pitch doubling, or double patterning as wiki calls it, it can go down to 16nm. Replace some iLine tools with Immersion tools and a fab is good til 2010 and beyond until 450mm.

[Thrax]

According to ExtremeTech (Which I pulled up for my above post), it was eUV. They just transcribed some Intel engineer for it. Who knows.

[Leonardo]

I would probably trust ExtremeTech over Wikipedia as a sole source.