Intel, Micron announce 3-bits-per-cell NAND
IM Flash Technologies, the joint venture between Intel and Micron, has announced volume production of 3-bit multi-level cell (MLC) NAND cells by the end of 2009.
While the current crop of flash drives and capacious SSDs use 2-bit cells, the 3-bit cell could improve capacities by fifty percent for the same physical dimensions.
IMFT has already released 32Gb (gigabit) evaluation chips that measure just 126mm². Each chip — about one fifth the size of your average postage stamp — contains nearly 11.5 billion of the new 3bpc cells.
“We see 3bpc NAND technology as an important piece of our roadmap,” said Brian Shirley, vice president of Micron’s memory group. “We also continue to move forward on further shrinks in NAND that will provide our customers with a world-leading portfolio of products for many years to come. Today’s announcement further highlights that Micron and Intel have made great strides in 34-nanometer NAND, and we look forward to introducing our 2xnm technology later this year.”
The 3bpc announcement comes just weeks after the introduction of 34nm cells which have slashed costs and improved storage density by over thirty percent. It is expected that these 3-bit multi-level NAND cells will get their sea legs in flash drives and flash cards.
For more information on NAND/flash memory, consider Icrontic’s primer entitled “The hows and whys of SSDs.”
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