Lost Circuits explains DDR2

Omega65

Lost Circuits: DDR, DDR2, (G)DDR3 -- So what's the Difference?

DDR-II Core Frequency vs. I/O Frequency vs. Data Rate

DDR-II is running the core at ½ of the clock frequency of the I/O logic. The I/O path, in turn, uses a DDR protocol, that is, transactions on the rising as well as on the falling edge of the clock. This translates into a total of four transfers for each core clock cycle. It follows that a total of four bits of data need to be “readied” at each core clock cycle by prefetching them from the array and temporarily holding them on pipelines within the I/O logic.

The net effect of this strategy can be described from a variety of different points of view. The first and foremost important aspect is that a slow core can be used to achieve high data frequencies. For example, a 100 MHz DRAM core can be used to achieve DDR400, a 133 MHz DRAM core can output data at 533 MHz. Related and second in line is the fact that a lower core speed will result in lower power consumption since power consumption is a linear factor of the operating frequency. Third, because of the lower frequency, it is possible to lower the operating voltage from 2.5V to 1.8V.

Source: Lost Circuits

Omega65

In a nutshell DDR2 is Dual Pumped (Double clocked) DDR

SDRam (Core Clock)(1 Data Transfer/Clock Cycle)
133mhz Core Clock -> 133mhz Clock Freq -> 133mhz Data Clock (1064MBs = PC133 or SDR133?)

DDR SDram (Core Clock)(2 Data Transfer/Clock Cycle)
133mhz Core Clock -> 133mhz Clock Freq -> 266mhz Data Clock (2128MBs = DDR266 or PC2100)

DDR2 SDram (Core Clock)*(Double Clocked)*(2 Data Transfer/Clock Cycle)
133mhz Core Clock -> 266mhz Clock Freq -> 533mhz Data Clock (4256MBs = DR2533 or PC4300)