AMD Finally Confirms Thorton existence
Omega65
Philadelphia, Pa
<a href=http://www.theinquirer.net/?article=10234>The Inquirer: <b>AMD Finally Confirms Thorton existence</b></a> (2003-06-28)
THE THORTON MICROPROCESSOR has now entered into AMD's own lexicon with the cognomen Model 10, and that's confirmed by the firm's own web site.
The cut-down Barton, with 256K level two cache, will replace Thoroughbred at PR ratings of 2000+, 2200+, and 2400+.
THE THORTON MICROPROCESSOR has now entered into AMD's own lexicon with the cognomen Model 10, and that's confirmed by the firm's own web site.
The cut-down Barton, with 256K level two cache, will replace Thoroughbred at PR ratings of 2000+, 2200+, and 2400+.
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Comments
ALL Athlons & Durons (Tbirds, Spitfires, Palys, Morgans, Tbreds, & Bartons) have 128K L1 Cache (64K Data + 64K Instruction = 128K L1 Total)
Using a Thorton core instead of a Tbred core means AMD only has to manufacture ONE Core instead of two. Bartons with Cache area defects become Thortons. All AMD has to do is deactivate the defective areas.
It's also how Intel makes it's Celeron Class CPUs....
I wonder if AMD is having problems with cache area defects because you can make more tbred cores than barton cores with the same size die.
It would be great if there would be some way for us to enable the area that has been disabled like the 9500->9700 mod.
Tek
Barton is to thorton as Athlon is to:
A. Kitten
B. Lasagne
C. Processor
D. Duron
E. None of the above.