AMD Opteron is Cleaning Up in Server Benchmarks
Spinner
Birmingham, UK
Starting in March of this year, an HP quad-CPU server broke the 2003 MAPI Messaging Benchmark 3 (MMB3) record. That was just the start for both 848 and 850 Series Opterons' march to the 2U and 4U performance pinnacle. Intel is clearly months behind in releasing a reasonable competitor. The Inquirer even now asks, "Is todayβs Xeon MP obsolete?"
Submitted by: Leonardo
Source: TheInquirer
Submitted by: Leonardo
Source: TheInquirer
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Comments
The CURRENT Xeon chips are dual pipe.
Furthermore, the processors will not feature their own independent dual channel DDR banks because the Tumwater and Lindenhurst chipsets <b>aren't even specced to do so</b>.
In fact, the Tumwater adds PCI Express 4x/8x, support for PC2700 and PC2-3200 memory, as well as an 800MHz bus. That's all it adds over the Plumas chipset for the existing Prestonia Xeons. The Lindenhurst adds x16 PCI Express and some other workstation-specific features.
The Nocona and Jayhawk chips (The Jayhawk having been cancelled in favor of an undisclosed revamp) will be debuted with the Tumwater and Lindenhurst chips with none of the features you mentioned.
John, I meant that AMD Opterons can access its OWN bank of memory on its own WITHOUT having to access the memory across a single memory controller. Opterons have their own memory controller built into the CPU so they have DIRECT access to memory. Unlike the aged Intel ZEONS, Opterons rule.
Maybe this picture will clear a few things up.