[Rumor] Intel to produce hex-core CPU

ThraxThrax 🐌Austin, TX Icrontian
edited February 2008 in Science & Tech
<p>Intel's flagship quad-socket (Or greater) Xeon is based on the <em>Tigerton</em> core and boasts the Xeon 7xxx moniker. The chips drop into Caneland platform which employs Intel's Clarksboro chipset. For server installations that require X86 and more than eight cores, Tigerton reigns supreme in the server space.</p>
<p>Word on the street, however, is that the <em>Tigerton</em> is about to be usurped by a wacky chip straight out of Intel's Bangalore fabs. Known as the <em>Dunnington</em> it will boast <strong>three</strong> <em>Penryn</em> dies for a total of six operational cores. Not only is it crazy-fast, it'll fit in the existing socket 604 Caneland platform which is sure to please enterprise administrators thirsting for more power. </p>
<p>This is expected to be the last development in the primary lifespan of the <em>Penryn </em>before <em>Nehalem</em> is born.</p>

Comments

  • LeonardoLeonardo Wake up and smell the glaciers Eagle River, Alaska Icrontian
    edited February 2008
    Is this purportedly being developed for servers and high-end workstations?
  • ThraxThrax 🐌 Austin, TX Icrontian
    edited February 2008
    Servers. Anything with the 7xxx (Or higher) model number is designed for 4, 8 and 16-socket Xeon deployments. For single and dual-socket Xeon machines, the Penryn-based Harpertown, or the older Conroe-based Clovertown fills that role.
  • muddocktormuddocktor
    edited February 2008
    I have the feeling that the fsb will limit throughput on this architecture. I look at this more as a filler until they have Nehalem rolled out and hitting on all cylindrs with it's csi bus. But 6 cores does sound cool. Just think how that puppy would fold or do other dc work. :D
  • mmonninmmonnin Centreville, VA
    edited February 2008
    I wonder what they will do with the empty space on the package. We all know it will be 3x dual-cores on one package. I doubt they would the shape of the die for this.

    CC
    CX

    C = a chip....what will X be? GPU?

    Does anyone know if the chip is squarish or more of a rectangle?
  • ThraxThrax 🐌 Austin, TX Icrontian
    edited February 2008
    More cache, I'd reckon. I believe it has 16mb shared L3, in addition to L2 exclusive to each set of two cores.
  • mmonninmmonnin Centreville, VA
    edited February 2008
    http://www.dailytech.com/article.aspx?newsid=10834

    Good ol' IBM leaving the info on a public server. :)

    So 45nm with 3mb L2....the only thing I could find quickly is the C2D E7200 and C2Q Q9300/Q9400 (which I'm guessing to be 2x E7200's in 1 package).

    According to the below Wiki page it will be 2.53GHz, 1066FSB, 9.5multi for $133. I bet they sell the hec-core CPU for a little more than 3x $133 + L3 cache cost. :)

    http://en.wikipedia.org/wiki/List_of_future_Intel_Core_2_microprocessors

    I guessing the C part below will have to be L3 cache as the E72 has none and 16mb is a hefty amount of wafer space even at 45nm.

    XX
    XC
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