Intel – Fresh Price Cuts For January

Mike Howes 13 Nov, 2006 at 7:31am ET Article published in Tech

Intel has told its partners it is again slashing prices on selected processors this coming January, as it steps up its attack against semiconductor rival, AMD.

The 651, 650, 641, 640, 631 and 630 series of chips are seeing further price cuts on the 21st of January. Intel will also be setting the price of the E5300 2MB 1.80GHz processor to $163, and introducing the VT-less 935 with 4MB of cache at $113.

The 7th of January will hail Intel’s introduction of the Q6600. a 2.40GHz, 8MB cache 1066MHz processor, with the Q8800 slated for introducion in Q3 of 2007.

Source: The Inquirer

Comments

13 Nov 2006 ~ 8:00am RWB 8MB of cache?! Why not 16MB
13 Nov 2006 ~ 3:48pm shwaip aside from price, there are other downsides to increasing cache size. Cache speed decreases with size, for example.
13 Nov 2006 ~ 4:07pm airbornflght they can fit whole applications in the cache now...
14 Nov 2006 ~ 12:29am shwaip

airbornflght wrote:

they can fit whole applications in the cache now...

and that has to do with what?

Also, sometimes you want to use the cache for multiple things...an OS and a program, for example.
14 Nov 2006 ~ 12:37am Thrax Whole applications in cache is actually totally worthless. Totally. Really.
14 Nov 2006 ~ 8:01am airbornflght yeh, but I read something about fitting the instruction sets or something (im sure that I'm butchering the terminology) in the cache from multiple programs and that could speed up processing a lot.
16 Nov 2006 ~ 12:33pm mmonnin

shwaip wrote:

aside from price, there are other downsides to increasing cache size. Cache speed decreases with size, for example.

O Rly? No reason it should. If so then Intel cant get their manufacturing process down correctly.
16 Nov 2006 ~ 10:22pm shwaip srsly, rly.

Charge doesn't travel instantaneously. As you make your cache bigger, the charge has to travel further, potentially twice as far if you double the size. This is only exacerbated as interconnects shrink (increasing resistance, and other cool effects).

@airborn

lots of processors implement a separate data and instruction cache (at least at L1).
16 Nov 2006 ~ 10:51pm airbornflght

shwaip wrote:

srsly, rly.

Charge doesn't travel instantaneously. As you make your cache bigger, the charge has to travel further, potentially twice as far if you double the size. This is only exacerbated as interconnects shrink (increasing resistance, and other cool effects).

@airborn

lots of processors implement a separate data and instruction cache (at least at L1).

I'm taking your word for all that, because I don't know much about it. Hopefully after 4-5 years I will know a lot more, because I am pretty sure that I am going into computer engineering. Though computer science is still in the back of my mind. I want to talk to some people about it, but I am leaning pretty heavy towards computer engineering right now. I guess I could major in computer engineering and minor in computer science
17 Nov 2006 ~ 6:53am RWB

shwaip wrote:

srsly, rly.

Charge doesn't travel instantaneously. As you make your cache bigger, the charge has to travel further, potentially twice as far if you double the size. This is only exacerbated as interconnects shrink (increasing resistance, and other cool effects).

@airborn

lots of processors implement a separate data and instruction cache (at least at L1).

soo..... 32MB then?
18 Nov 2006 ~ 12:59pm shwaip hehe.

at 8mb of cache, that's about half the cpu's die spent on cache. If you quadruple that, you're going to absolutely tank the yields from wafers.