After an October announcement that the firm had finalized the design for its 40nm 2Gb DDR3 ICs, Elpida announced today that it has begun production on the new chips.
The new 2-gigabit (256 megabyte) DDR3 SDRAM process achieves 44% more chips per wafer compared to the firm’s standing 50nm process, and it boasts a 100% yield rate at the JEDEC-ratified DDR3-1600 speed grade. Further compared to 50nm chips, the new 40nm parts use about two-thirds less current and operate at 1.2/1.35V, rather than the DDR3 standard of 1.5V, for a reduced power consumption of around 50%.
Elpida has planned a phased expansion for the new parts which will begin with mass production at its Hiroshima plant. Production will expand to Rexchip, a Taiwanese subsidiary, in 2Q10 to increase capacity and lower product costs. Finally, if market conditions are favorable, the technology will be transferred to foundry partners ProMOS and Winbond to further expand production.
Downstream products based on these new ICs will be ripe for overclockability, if not boast faster bins than what the market currently offers. With such high yields at DDR3-1600, significantly lower stock voltage and reduced power consumption, 40nm Elpida chips should offer more overclocking headroom than the market’s multi-vendor glut of 50nm chips that cannot be pushed much faster.
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