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Samsung unveils 30nm 3-bit MLC NAND

Samsung unveils 30nm 3-bit MLC NAND

Samsung, the world’s leading supplier of DRAM and NAND ICs, has announced today that it has begun mass production of 3-bit NAND cells on the 30nm process node.

“Introducing cost-efficient, 30nm-class 3-bit technology widens our NAND memory solution base to make NAND even more enticing for increasingly diverse market applications,” said Soo-In Cho, EVP and GM of the Memory Division at Samsung Electronics. “Our 3-bit NAND memory will support the development of more cost-competitive, high-density consumer electronics storage solutions.”

The primary benefit of a 3-bit MLC is storage density, as the technology offers 50% more storage per chip than the market’s reigning 2-bit MLC. The new cells will first make their appearance in memory cards, flash drives, and CE devices, and will enable downstream manufacturers to economically boost device capacities above the 32GB mark.

However, people dreaming sugarplum dreams of larger, cheaper SSDs will be disappointed. Because increasing storage density in a multi-level cell (MLC) requires additional voltage to read the additional storage bits, 3-bit cells will wear too quickly for use in solid state disks. That means, for now, the SSD market will continue to advance the proven 2-bit cell for mass storage, and employ die shrinks to improve density areally.

The Samsung cells are likely to go head-to-head with the SanDisk/Toshiba team’s 32nm 3-bit cells and 43nm 4-bit cells, both of which have begun to appear in flash cards, flash drives and CE devices as Samsung plans for its new kit.

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