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Intel Pentium 4 Prescott 2.8GHz Review

Unknown
edited November 2003 in Science & Tech
OCHeaven: -Intel Prescott Report
Chinese version
English version

Precott comes with 0.09 micron (90 nano) manufacture techology, Die size 112 mm2, 125,000,000 transistors. FSB 800MHz, supporting Hyperthreading tech, 1.4V (maybe 1.35V but the sample we got is 1.40V ) power exceed 103W, supporting SSE 3 multimedia instruction set and extra 13 sets of Prescott new instruction, 12K L1 and 1M L2 Cache built-in.

Source: [link=http://www.theinquirer.net/?article=12682]The Inq[/link]

Comments

  • TheLostSwedeTheLostSwede Trondheim, Norway Icrontian
    edited November 2003
    Was that "review" babelfished? How the hell can they upload that crap and also have the guts to spread it? Smells bs all over that place.
  • ShortyShorty Manchester, UK Icrontian
    edited November 2003
    Smells like BS to me. Il ask my Intel contact and see what they say.
  • Omega65Omega65 Philadelphia, Pa
    edited November 2003
    Its an English page off of a Chinese site
  • LeonardoLeonardo Wake up and smell the glaciers Eagle River, Alaska Icrontian
    edited November 2003
    Was that "review" babelfished?

    No, not at all! That site just hired Abit's motherboard manual translator to do their English language page. :confused:
  • ketoketo Occupied. Or is it preoccupied? Icrontian
    edited November 2003
    ;D Ya, Abit isn't the only culprit by far but they have some classic lines.:buck:
  • EnverexEnverex Worcester, UK Icrontian
    edited November 2003
    What, why?! 12k Level 1 cache?..

    ...... why???

    Isn't that like building a stack Hi-Fi system then using a piece of cheese as speaker cabling?

    NS
  • Geeky1Geeky1 University of the Pacific (Stockton, CA, USA)
    edited November 2003
    NS, yeah, but the P4 has 8k, so...
  • EnverexEnverex Worcester, UK Icrontian
    edited November 2003
    Geeky1 had this to say
    NS, yeah, but the P4 has 8k, so...

    Thats even worse than cheese, thats like just expecting the HiFi to magically transfer the signal to the speakers.

    Geez.

    I thought the P4's has 12+8 or something like that, or am I just highly confused (it took me 7 attempts to find the "e" key :( )

    NS
  • Geeky1Geeky1 University of the Pacific (Stockton, CA, USA)
    edited November 2003
    The P4 has 8k of L1, 256-512k of L2.
  • ThraxThrax 🐌 Austin, TX Icrontian
    edited November 2003
    It's associative cache, though. That is the L1 and L2 cache share data back and forth.

    The Athlon is exclusive cache. What's meant for L1 stays in L1, what's meant for L2 stays in L2.

    I don't know which one is better. Probably the Athlon's judging everything else. ;D
  • GobblesGobbles Ventura California
    edited November 2003
    not that im pro intel or anything... but come on.. trying to say the northwood is faster in some benchs then the prescott..

    Kinda doubt it... it looked more like, from the pictures, that they took a p4 north and then made their own heat spreader and put it on a p4 willie...

    but what ever.... and

    In my life ive never met a chinese guy named Rex...

    Gobbles
  • fudgamfudgam Upstate New York
    edited November 2003
    Gobbles, but how many chinese people have you met overall? (I'm just joking, kinda)
  • SimGuySimGuy Ottawa, Canada
    edited November 2003
    It makes sense. Prescott adds PNI & SSE3, double the L2 cache along with the move to a 0.09 micron manufacturing process. As is classic with new Intel chips, Prescott will be launched with 2 versions, the Socket 478 and the new Land Grid Array 775 socket later on with the Grantsdale chipset series.

    Since no software exists that really uses PNI (Prescott New Instructions) or SSE3, the advantage the Prescott has over the P4 is eliminated. We've seen how well the P4EE 3.2 performs over the P4C 3.2, not by much.

    So, it's reasonable to assume that the 400 MHz faster P4C 3.2 GHz will outpace the Prescott 2.8 GHz in benchmarks that rely on raw megahertz and don't use much L2 cache at all. :)

    In order to make their own heatspreader, they would need an exact duplicate and need a laser printing machine to engrave those markings on the top of the CPU. It seems that the FPO/Batch numbers make sense, describing the Prescott's ID code, stepping, L2 cache and internal PID.

    Prescott is not Pentium 5. It's the last evolutionary step in the P4 family. The proper name should be P4D for the Socket 478 versions and P4D-L for the LGA775 versions.

    Tejas will be Pentium 5 (accoding to Intel roadmaps).

    It couldn't be a Willamette CPU, as the Willamette P4's had a large green PCB base around the actual CPU package, which had Trace & signalling lines running through it that were required for the correct operation of the CPU. :)
  • madmatmadmat
    edited November 2003
    I was reading on another site that the preview in question is actually an older preview that's been cleaned up and translated and set out as a "new" preview.
    The guys that did the earlier preview actually own both sites in question...the one that did the first preview and the one showing the cleaned up translated new version.
  • Straight_ManStraight_Man Geeky, in my own way Naples, FL Icrontian
    edited November 2003
    Um, when L3 is ON DIE, you do not need more L1 to buffer for I\O timing overhead to remote L3 because those rates and density you also need all the RAM like circuits NOT in the CPU core itself but next to it to spread the heat imposition loadmore evenly across the CPU DIE. Thus, L2 and L3 larger, but since whole thing is on-die I\O overhead in terms of TIMESLICES on CPU is so fast\smallin slices you do not need much L1 at all. L1 used to be bigger because L2 and L3 were so much proportionately SLOWER natively and also distance played a part in timeslice lag. So, L1 had to supply CPU and buffer CPU<-->L2 or CPU<-->LONG BUS<-->L3. Proximity is now in vary small parts of an inch for L3<-->CPU circuit CORE on die, so less L1 needed. Make sense??? Lots of the workload L1 had is now handled by a very proximate and speed pumped L2 that is also VERY fast.

    John-- who can remember L2 coming in long DIP type IC tubes with ten-twenty DIPS per 3' tube and you put in what you wanted the machine to have, and it was where RAM now is in sockets--RAM was on other end of mobo from CPU, bottom middle to bottom right typically. Yes, I started repairing and upgrading before the 386 was an enginer's dream

    John.
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