AMD Opteron is Cleaning Up in Server Benchmarks

Comments

1. 
   21 May 2004 ~ 10:58pm mmonnin Anything that needs constant memory bandwidth will DIE on the XEON. Since the Opteron CPUs have their own bank of memory it scales much better and wins hands down.
2. 
   22 May 2004 ~ 1:26am Thrax /me gives the "Proud father" look
3. 
   22 May 2004 ~ 8:20pm Straight_Man Actually, the next Xeon major release is likely to be dual-pipe Xeons and chipsets that support multiple Dual channel banks of RAM, one Dual channel bank per CPU die. IF that is not shelved due to heat.
4. 
   22 May 2004 ~ 8:38pm Thrax All DDR processors are dual pipe. This is how you get a 64bit bus, John.
   
   The CURRENT Xeon chips are dual pipe.
   
   Furthermore, the processors will not feature their own independent dual channel DDR banks because the Tumwater and Lindenhurst chipsets <b>aren't even specced to do so</b>.
   
   In fact, the Tumwater adds PCI Express 4x/8x, support for PC2700 and PC2-3200 memory, as well as an 800MHz bus. That's all it adds over the Plumas chipset for the existing Prestonia Xeons. The Lindenhurst adds x16 PCI Express and some other workstation-specific features.
   
   The Nocona and Jayhawk chips (The Jayhawk having been cancelled in favor of an undisclosed revamp) will be debuted with the Tumwater and Lindenhurst chips with none of the features you mentioned.
5. 
   22 May 2004 ~ 9:07pm Kwitko Well then obviously John is right and Intel's own specs are wrong.
6. 
   22 May 2004 ~ 9:35pm mmonnin Hehe Seth.
   
   John, I meant that AMD Opterons can access its OWN bank of memory on its own WITHOUT having to access the memory across a single memory controller. Opterons have their own memory controller built into the CPU so they have DIRECT access to memory. Unlike the aged Intel ZEONS, Opterons rule.
   
   Maybe this picture will clear a few things up.
7. 
   22 May 2004 ~ 9:36pm Thrax Rofl